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512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Electrical Specifications – I DD Parameters
Table 11: I DD7 Specifications and Conditions (x16 and x32)
Notes 1, 5, 9, and 10 apply to all parameters and conditions; V DD /V DDQ = 1.70–1.95V
Parameter/Condition
Symbol
Low Power
Standard
Units
Self refresh
Full array, 105?C
I DD7
N/A 11
N/A 11
μ A
CKE = LOW;
t CK
=
t CK
(MIN);
Full array, 85?C
TBD
700
μ A
Address and control inputs are stable;
Data bus inputs are stable
Full array, 45?C
Half array, 85?C
Half array, 45?C
1/4 array, 85?C
1/4 array, 45?C
1/8 array, 85?C
1/8 array, 45?C
1/16 array, 85?C
1/16 array, 45?C
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
390
520
310
430
275
430
275
375
250
μ A
μ A
μ A
μ A
μ A
μ A
μ A
μ A
μ A
Notes:
1. A full initialization sequence is required before proper device operation is ensured.
2. I DD is dependent on output loading and cycle rates. Specified values are obtained with
minimum cycle time and the outputs open.
3. The I DD current will increase or decrease proportionally according to the amount of fre-
quency alteration for the test condition.
4. Address transitions average one transition every two clocks.
5. Measurement is taken 500ms after entering into this operating mode to allow tester
measuring unit settling time.
6. Other input signals are allowed to transition no more than once every two clocks and
are otherwise at valid V IH or V IL levels.
7. CKE is HIGH during REFRESH command period t RFC (MIN) else CKE is LOW.
8. Typical values at 25?C (not a maximum value).
9. Enables on-die refresh and address counters.
10. Values for I DD7 85?C full array and partial array are guaranteed for the entire tempera-
ture range. All other I DD7 values are estimated.
11. Self refresh is not supported for AT (85°C to 105°C) operation.
PDF: 09005aef8459c827
512mb_mobile_sdram_y67m_at.pdf – Rev. B 3/11 EN
18
Micron Technology, Inc. reserves the right to change products or specifications without notice.
? 2011 Micron Technology, Inc. All rights reserved.
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